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(EESM501)[2009](f)quiz~1833^_33814.pdf
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HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
Department of Electronic and Computer Engineering
EESM 501 - CMOS VLSI Design
Fall 2009

November 12, 2009 Quiz 1 Duration: 30 minutes

STUDENT NUMBER: FAMILY NAME (SURNAME): FIRST NAME:
SOLUTION

TURN OFF YOUR PHONE
Write your student number, family name, and first name (no acronyms).
Copy sheets and books are NOT permitted.
No electronic equipments. NO CALCULATORS.

Write clearly. You can write to the back of the papers. Do not hesitate to ask for additional blank papers if you need.
You cannot leave the exam room during the quiz.
Q (14pt) Consider the following circuit.
Input



Output
Circuit 1:








Cin

CL
The maximum input capacitance (Cin) is equivalent to the maximum gate capacitance of a 12 wide and 2 channel length (W = 12 and L = 2) MOSFET. The load capacitance (CL) is equal to the input capacitance.
(a) (5pt) Determine the minimum delay achievable with this circuit for the given load capacitance.
C
F = L =1
Cin
2pt
4
1pt

fopt = F =1 Dmin = 4 fopt + p1 + p2 + p3 + p4 =
4 +1+1+1+1 = 8

0.5pt each

(b) (4pt) Draw the transistor level schematic of the circuit. Size the circuit to minimize the delay. Determine the size of every transistor (both the width and the length in ) for achieving the maximum speed. Assume that the inverter template has a 2:1 PMOS to NMOS width ratio.
CC CC
L in4 in3 in2

fopt =1 ====
CCC C
in4 in3 in2 in

. C = C = C = C =12
in4 in3 in2 in
0.5pt 0.5pt 0.5pt 0.5pt
PMOS: PMOS: PMOS: PMOS: 8/2 8/2 8/2 8/2

Input



Output





Cin

CL
NMOS: NMOS: NMOS: NMOS:
4/2 4/2 4/2 4/2

0.5pt
0.5pt
0.5pt
0.5pt

(c) (5pt) Find the unit-less delay of the following circuit. The input capacitance (Cin) is equivalent to the maximum gate capacitance of a 12 wide and 2 channel length (W = 12 and L = 2) MOSFET. The load capacitance (CL) is equal to the input capacitance.
PMOS: PMOS: PMOS: 16/2 96/2 1152/2
Input



Output
Circuit 2:








Cin

CL
NMOS: NMOS: NMOS:




8/2 48/2 576/2
D = p + f =1+ Cin2 =1+ 2 = 3 1pt
inv1 11 Cin
in3

D = p + f =1+ C =1+ 6 = 7 1pt
inv2 22 Cin2
C
1pt

D = p + f =1+ in4 =1+12 =13
inv3 33 Cin3
CL 12

D = p + f =1+=1+. 1 1pt
inv4 44
Cin4 1728 D = 3 + 7 +13 +1 = 24
1pt