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(elec101)[2010](f)midterm1~3115^_10031.pdf
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DEPARTMENT OF ELECTRONIC AND COMPUTER ENGINEERING
HONG KONG UNIVERSITY OF SCIENCE OF TECHNOLOGY
ELEC 101 BASIC ELECTRONICS
Quiz #1
19:30 -20:30 13 October 2010 LT-A/B/D
Name:
Student No. :
Session (please circle) : L1 L2 L3
Department:
~Scores
Maximum Scores
Questions
8 I
1
2
12
16
3
4
14
12
5
20
i 6
7
18
i I Total -
100
1. Answer all questions in the space provided.
2. This is a closed book examination. No additional sheet is allowed.
3. Show all your calculations clearly. No marks will be given for unjustified answers.
4. Do your own work. Any form ofcheating is a violation of academic integrity, and will be dealt with accordingly.
..
1. Write down the logic function X of the following gate structure as a function of A, Band C. Show your step clearly in order to get the full credit. No need to simplify the answer.
A B
x
c
'f~
CA+,(3)t c " C8 f C)
~
~
2. Simplify the logic function X == (A +B) (A C + A C) + A B +B Show your step clearly in order to get the full credit.
Y::. CA -(-13) r Cf.1. C 1-f} ~ C) + IJ -6 ~ 6 :: CA -+8). A Cc +c)+ f) f3 r (8
<'
:: CPJ f 8) ~ IJ I -+ C A ~ I ) , If
-~..f6) '/+ -+-15
:: ALA -r AB -f !j
::-4 teA--f-I). e
::::-Pr -r g
3. (a) A logic function has 4 inputs ABeD and 1 output F. Its truth table is shown as follow. X is "don't care". Use K-Map to find the most simplified function F.
A B C D F
0 0 0 0 1
0 0 0 1 0
0 0 1 0 1
0 0 1 1 X
0 1 0 0 X
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 X
1 0 0 1 X
1 0 1 0 1
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1
1 1 1 1 1
fI By
Pr6~vo l of I~ Y
I
00
;f--!fe
(r I 0
~ 8L
~
r~
1 ~\I ,
-
r-~ B -]) f A 8 + B C
(b) Use NAND gate only to implement the function F in part (a). Only variables A, B, C and D are available. Multiple-input NAND gate can be used.
A -dJ
5
L
'--
~~
_I /'-"
C ' ~
p--cO-
4. Complete the transition table of the synchronous sequential circuit shown below. Show your steps and thinking clearly in the space below in order to get the full or partial credit.
x
, IJ QI .Q
\----1 K C;K Q
CLK
x CLK Qn+1 Qn+1
o 1 f 1 19", o 0."
Crise /; X=-o
fXn:::-o
,
J:o ( k:: 0, Q.+f:::' I j
biYl-f'1
C,fJ/J..t ),; 'f :-0 rJ,,:::-/ J -I k-I (J ::
/ / -/ ---P'lf' ::::: -0 ~
, n
~,~ y :: /
6l. V1 -::-0 J:: 0 }(::-/
I / I (}111'f, ::::: 0
"
{j"+1 =-0
~'fJ' 't. :: I
/ f9 ", c.. I
I
J =-I " )(0-I / (Y... f-I :::. (;
L
[/I -7J I --0/\ I
-
!;. +-/ -
( 1:) (h) +--vjI --0)\ J
/\ J --:: 11.IJ
of:; b'./1 5-J
-z:..
+
""'--<--
7-t1f\
:~.J7 g 1)7/
A9
6. (a) Find Vo in the below circuit using nodal analysis (node voltage analysis).
VfI"
20
VIJ
3 ::.-+ ~,-LIe
-
2-
>
3 0 :: 5' VA -f )... 114