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(ELEC102)final_pastg.pdf
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(15)

(a) Name two advantages of MOSFET. (b) Draw the cross sectional diagram for an enhancement NMOSFET and describe very briefly the structure. Are IG = 0 and ID = IS? (15)
(a)
small size (scaled down easily)
and low power consumption.

(4) (b)
D : drain
Oxide layer
VD B : Body
ID
(insulator)
(or substrate)

VG
IG
source
G : Gate
usually Metallic film shorted to body
IS
VS
IG = 0
S : source

ID = IS
(1)
An NMOSFET consists of a metal gate insulated from a p-type semiconductor substrate (or body) by an insulating layer of silicon dioxide. On either side of the gate there are n type regions forming the drain and source.
(10)
(16)

In the circuit, find V1 . Show clearly your reasons . 1 (16)
Given that VT= 1V , K = 2 mA/V2.
At triode region , VGS VT , VDS < VGS -
(c)
VT , ID = 2K(VGS CVT)VDS C KVDS2
At saturation region , VGS VT , VDS
VGS -VT , ID = K[(VGS CVT)2 ]
2.5V
V1 1k.

2mA
2.5V
(c)
V1

2V

2mA
1k. VGS = V1 -2 VDS = 0.5V
(4)
NMOS may be triode since VDS ~ 0
2
VDS
I = 2K[(VGS . VT )VDS . ]
2 0.52
2mA = 2*2[(V1. 2 .1)*0.5 . ]
2 2mA
V1 = ( + 0.125)*2 + 3 = 4.25V
(8)
4
Hence NMOS is triode since
1. VGS > VT 2.25 > 1
(4)
2. VDS 0.5 < 2.25 -1
< VGS CVT
2
VDS
I = 2K[(VGS . VT )VDS . ]
2
0.52
= 2*2m[(4.25 . 2 .1)*0.5 . ] = 2mA
2
(18)

Find I . Show clearly your reasons. (18)
Given the NMOS are identical, VT = 1V, K = 0.25m A/V2 . At triode region , VGS VT , VDS < VGS -VT , ID = 2K(VGS CVT)VDS C KVDS2 At saturation region , VGS VT , VDS VGS -VT , ID = K[(VGS CVT)2 ]

6V
1k. Vo 1k.

I
Assume 2 NMOS are in saturation and use KCL
(4)
I = K (V .V )2
D GST
26.Vo 2 Vo
0.25m*(6.Vo.1) += 0.25m*(Vo.1) +
1k. 1k.
(4)
From symmetry, Vo = 3V (5)
mAmI 11)3*(60.25 2 =..= (2)
Hence NMOS is saturate since 1. VGS > VT 3 > 1 2. VDS > VGS CVT 3 > 3 -1 VGS1 = 3V VDS1 = 3V VGS2 = 3V VDS2 = 3V (4)

1m
6V

3m
1k. 3V


3m 1m
1k.





(17)

In the diode circuit, find Vc . Hence sketch and label clearly Vo(t) .
D1 is an offset diode with VF = 0.7V . (17)
(a)
-VC+


C Vo (t)
Vi(t)
5V

Vi(t)

D1
-4V -13V -2V1V

-12 -2.7 Vo (t)

-9.3 +
(a)
Vo (t)
-13V
5V
1V
1V

VC = 9.3V (11)

Vo = Vi +1+ Vc= Vi + 10.3V (3)
Vo(t) 15.3V 6.3V

(3)
-2.7V

OR -VC+
C Vo (t)
Vi(t)
6V

Vi(t) -3V -12V



Vo = Vi + Vc= Vi + 9.3V

(3)

(24)

In the ideal diode circuit, plot V3 versus V2 for V2 = 4 to 12V
V2 = 12 to 18V
18V V2 0V. (24)
(b)




V3 = 4 to 8V V2
D1
D11k. 1k.1k.
8V
1k. 8V 1k.
4V
1k.
4VV3 1k. 4VD2 D1

4-6m
0-4m

0-2m8V V3
10V
V2 = 0 to 4V

8V 4VV3 = V2
D1 V2

0V 4V 18V
12V
8V 1k.
(8) (8) (8)
1k. 4V



(15)


(a) Find the model of the diode D1 at breakdown.
4 (a)
(b) Find I1 if R3 = 1k., I2 = 5mA, R1 = R2 = 4k., V1

model
= 3V.