=========================preview======================
(ELEC151)2007_s_midterm2_elec151.pdf
Back to ELEC151 Login to download
======================================================
07-1. Flip-flops (20%) In the following is a master/slave D flip-flop made of 6 inverters and 4 transmission gates. Replace two inverters by two 2-input NAND gates, so a Negative Asynchronous Reset can be applied to this D flip-flop. The negative Asynchronous Reset can reset Q to 0 immediately and hold the value till the next clocking event. There are many designs. Please provide two different designs.
07-2 Asynchronous Counter ---Analysis (15%) For the following asynchronous counter, please draw its state-transition diagram starting from (0 0 0 0). The states are represented by (Q3 Q2 Q1 Q0).
07-3 Counter Designs (15%) Use J-K flip-flop as the first flip-flop, D flip-flop as the second flip-flop and T flip-flop as the third flip-flop to design a three-bit Gray code counter (A B C) that counts in the following sequence: 000, 001, 011, 010, 110, 111, 101,100 and repeat. Just write down the minimized Boolean expressions for the flip-flop inputs. Do not have to draw the schematics.
07-4. VHDL Designs C Combinational Logic (20%) Write a VHDL code to design a 4-to-1 multiplexer below by a) Structural architecture (10%) (Use Z for high impedance in transmission
gate)
(Y <= I WHEN (S=1 AND SB=0) ELSE Z;)
b) Dataflow architecture (5%)
c) Behavioural architecture (5%)
ENTITY mux4 IS PORT ( S: IN STD_LOGIC_VECTOR (1 downto 0);
I: IN STD_LOGIC_VECTOR (3 downto 0);
Y: OUT STD_LOGIC); END mux4;
07-5 VHDL Design C Sequential Logic (10%)
Write a VHDL code to design a synchronous BCD counter with asynchronous reset. The logic symbol is shown below. Reset is active low and CLK is positive edge triggered. (10%)
07-6 TTL Counters (20%) Below are the available TTL IC counters. We discussed five 4-bit binary counters in the class. There are 74LS93, 74LS161A, 74LS163A, 74LS191 and 74LS193. The logic symbols are also shown below
a) Which 4-bit binary counter is the best 4-bit binary counter, and why? (5%) b) Design a Hexadecimal counter to count from 23 to CE with 2 74LS163 counters and NAND gates. (10%) c) Design a BCD counter using TTL 74LS93. (5%)