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(ELEC301)[2009](s)final~ee_cnh^_10315.pdf
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HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
Department of Electronic and Computer Engineering
ELEC 301 - CMOS VLSI Design
Spring 2009

May 29, 2009
STUDENT NUMBER: FAMILY NAME: FIRST NAME:

SOLUTION

No electronic equipments other than a simple calculator.
Write clearly. You can write to the back of the papers. Do not hesitate to ask for additional blank papers if you need.
You cannot leave the exam room within the last 10 minutes of the exam.
Q1 (10pt) Use the following table to answer the following questions.

* Equivalent resistance extracted for |VGS| = VDD and |VDS| = VDD VDD/2
(a) (4pt) Determine the relative sizing of the p-channel and n-channel devices of a CMOS inverter in order to achieve equal output low-to-high and high-to-low propagation delays at VDD = 1V (2pt). Similarly, determine the relative sizing required to achieve equal output low-to-high and high-to-low propagation delays at VDD = 2.5V (2pt). All the devices must have minimum channel length (L = Lmin). Assume that the total load capacitance is the same for the output low-to-high and high-to-low transitions. Assume that an ideal step input (zero rise and fall times) is applied to the inverter.
Answer:
With the given assumptions, the low-to-high and high-to-low propagation delays are determined
only by the resistances of the PMOS and NMOS transistors, respectively. To equalize the delays,
the resistances of the transistors must be equalized. Since all the devices must have minimum
channel length, the resistances would be equalized by adjusting the widths of the transistors.

R
W 0_ PMOS 115
At VDD = 1V: PMOS = == 3.29 , PMOS transistor must be sized 3.29 times larger
WR 35
NMOS 0_ NMOS
(wider) than the NMOS transistor. (2pt)
R
W 0_ PMOS 31
At VDD = 2.5V: PMOS = == 2.38, PMOS transistor must be sized 2.38 times larger
WNMOS R0_ NMOS 13 (wider) than the NMOS transistor. (2pt)
(b) (6pt) Use the data listed in the table to compare the velocity saturation phenomenon in n-channel and p-channel devices at low and high supply voltages.
Answer:
The low field mobility of electrons is higher than the holes. Furthermore, the saturation velocities of electrons and holes are somewhat similar. The n-channel devices therefore experience velocity saturation at smaller electric fields (and smaller source-to-drain voltages) as compared to the p-channel devices. In other words, for a given supply voltage, an NMOS transistor experiences more severe velocity saturation as compared to a PMOS transistor.
This can be observed by looking at the relative resistances of the same sized NMOS and PMOS transistors for the same set of terminal voltages, as given in the Table. At VDD = 1V, the electric field between the source and drain is relatively small. Therefore both devices experience less velocity saturation due to the lower supply voltage. The relative strength (relative channel resistance) of the NMOS and PMOS transistors is determined pr